# Solver Notes

## Formula Notes

- The instances are CBMC bit-vector encodings of Summle puzzles over 16-bit
  `unsigned short` arithmetic.
- The fixed input multiset is structurally visible as `1,2,2,4,4,8,25,100`.
  The solver does not use DIMACS comments or filenames.
- The target is recovered from repeated 16-bit equality comparators. For this
  split the useful targets are the unique constants greater than 100 with one
  comparator per step. Targets above 65535 appear modulo 2^16.
- The selected operand positions are 16-bit CBMC input vectors. They appear as
  the first `2 * steps` high-degree contiguous 16-variable blocks below var
  3000. They are ordered `A0,B0,A1,B1,...`.
- Operation input bits are deliberately left unconstrained by the high-level
  mapper. Unit propagation and completion choose values consistent with the
  fixed operand schedule; this avoids brittle assumptions about CBMC's switch
  encoding, especially for division.

## Techniques Used

- Structural detector for CBMC equality blocks and operand-position bit
  vectors.
- Direct dynamic programming solver for the recovered Countdown/Summle problem.
  It combines subsets of the eight input positions with addition, subtraction,
  exact division, and CBMC's 16-bit multiplication semantics, including wrapped
  products that pass the original overflow check.
- SAT model construction by assigning only the recovered operand positions,
  then running watched-by-occurrence unit propagation and a small backtracking
  completion over unsatisfied Tseitin clauses.
- Before printing `SATISFIABLE`, the solver independently checks every original
  CNF clause under the complete assignment.

## Remaining Things To Try

- Detect operation source bits robustly and set them directly for a small speed
  improvement. The current operation-free completion is still sub-second on the
  training split.
- Generalize target/input detection if future instances change the input
  multiset or use more than eight steps.
- Add more candidate expression retention if future high-level targets require
  a different expression with the same value and input subset.

## Known Limitations

- Only SAT models are produced. Unsupported structures return `UNKNOWN`; no
  VeriPB UNSAT proof strategy is implemented.
- The detector assumes the same CBMC layout family: 16-bit values, eight
  inputs, and contiguous operand-position vectors near the beginning of the
  formula.
- The completion procedure is bounded. It is intended to finish the Tseitin
  circuit after the high-level puzzle is fixed, not to act as a general SAT
  search.

## Changelog

- Replaced scaffold with a C++ structural Summle solver.
- Added target and step detection from equality comparators.
- Added direct subset-DP high-level solver with CBMC-compatible multiplication
  overflow behavior.
- Added CNF model construction, propagation, bounded completion, and final
  full-clause validation.
- Switched operation variables from direct bit assignment to completion-driven
  assignment to support division cases reliably.
