# Solver Notes

## Formula Notes

The train split is a family of bit-vector multiplier circuit CNFs. Clauses are
unit clauses plus four-clause ternary Tseitin blocks. Grouping ternary clauses
by their maximum variable recovers an acyclic gate DAG: two-input AND/XOR/OR
gates for the carry-bit and Wallace variants, plus small three-input mux-style
gates in the carry-save variants. Variables before the first gate output are
the two multiplier inputs. The first ternary clause gives the split point for
the two factors, and the unit clauses encode the target product bits in order.

The Wallace large instances include a product-bit unit on the first gate output,
so the number of unit clauses is not always exactly the number of primary input
variables. The solver therefore infers primary inputs from the first gate output
instead of from the unit count.

## Techniques Used

- Structural gate recovery from sanitized DIMACS only; comments and filenames
  are ignored by the solver.
- Deterministic Miller-Rabin and Pollard-Rho factoring for the recovered product
  integer.
- Divisor enumeration to find a factor split fitting the recovered input widths.
- Direct gate-DAG evaluation to fill every auxiliary variable.
- Full independent CNF clause check before printing `s SATISFIABLE`.

## Remaining Things To Try

- Extend integer support beyond 126 product bits if the hidden split contains
  larger multipliers. The current implementation uses `unsigned __int128` and
  rejects wider unit-product vectors conservatively.
- Add support for non-SAT/proof output only if an unsatisfiable member of this
  exact family appears. The current train split and baseline are SAT-only.

## Known Limitations

- Returns `UNKNOWN` if the CNF is not a prefix-input, increasing-output gate DAG
  with fanin two or three and ternary clause groups of four clauses per output.
- Returns `UNKNOWN` for product vectors of 127 bits or more rather than risking
  overflow in the factoring layer.
- Does not emit UNSAT proofs.

## Changelog

- Initial scaffold replaced with a structural multiplier solver in C++.
- Added profiling notes and a local analysis helper under `tools/`.
- Changed gate grouping from absolute-variable triples to output-variable
  groups to support carry-save mux gates and Wallace product-bit output units.
- Added support for fanin-three truth tables and complete model verification.
- Filled `meta.json` with solver description and techniques.
